1. Field of the Invention
The present invention relates to a method of manufacturing a field effect transistor, and more particularly, it relates to a method of manufacturing a field effect transistor which can improve dimensional accuracy of a gate electrode.
2. Description of the Background Art
A conventional method of manufacturing a MOS (metal oxide semiconductor) field effect transistor is now described. As shown in FIG. 25, a silicon oxide film 63, a polycrystalline silicon film 65, a tungsten silicide film 67, another silicon oxide film 69 and a photoresist layer 71 are successively formed on a silicon substrate 61. Then, a mask 73 is arranged above the photoresist layer 71 for forming a gate electrode.
As shown in FIG. 26, i rays (.lambda.=365 nm) are applied through the mask 73, which has a light intercepting portion 73a allowing no transmission of the i rays. Portions of the photoresist layer 71 irradiated with the i rays are exposed. Thus, the photoresist layer 71 is separated into exposed portions 71a and an unexposed portion 71b, as shown in FIG. 27.
The exposed portions 71a are removed from the photoresist layer 71, as shown in FIG. 28. Then the unexposed portion 71b of the photoresist layer 71 is employed as a mask to partially remove the silicon oxide film 69, the tungsten silicide film 67 and the polycrystalline silicon film 65 successively by etching, thereby forming a gate electrode 66, as shown in FIG. 29.
As shown in FIG. 30, the unexposed portion 71b is removed and the remaining portion of the silicon oxide film 69 is employed as a mask to implant ions into the silicon substrate 61, thereby forming source/drain regions 68a and 68b. Then a silicon oxide film 70 is formed on the silicon substrate 61, as shown in FIG. 31.
As shown in FIG. 32, the silicon oxide film 70 is etched back to form side wall insulating films 70a and 70b. The gate electrode 66 is insulated from other wires by the side wall insulating films 70a and 70b and the silicon oxide film 69. The steps of manufacturing a MOS field effect transistor are thus completed.
As shown in FIG. 32, the silicon oxide film 69 is so provided as to electrically insulate the gate electrode 66 from other wires. Since the silicon oxide film 69 is transparent to the i rays, the i rays are multiply reflected in the silicon oxide film 69 in exposure of the photoresist layer 71 to cause standing waves, which spread or narrow the unexposed photoresist portion 71b. Referring to FIG. 33, the unexposed photoresist portion 71b is spread in excess of desired dimensions by such standing waves caused in the silicon oxide film 69. Referring to FIG. 34, on the other hand, the unexposed photoresist portion 71b is narrowed as compared with the desired dimensions. Such spreading or narrowing of the unexposed photoresist portion 71b depends on the thickness of the silicon oxide film 69. In more concrete terms, the unexposed photoresist portion 71b is spread when the silicon oxide film 69 has a certain thickness value, while the former is narrowed when the latter has another thickness value. When such a photoresist portion is employed as a mask to form a gate electrode, it is impossible to attain desired dimensions of the gate electrode and hence desired characteristics cannot be attained in the as-obtained MOS field effect transistor.
If portions around such a photoresist layer is stepped, further, a portion of this photoresist layer to be left as a mask is disadvantageously separated by irregular reflection of the i rays, in addition to the aforementioned multiple reflection. This disadvantage is now described. As shown in FIG. 35, a silicon oxide film 79, a polycrystalline silicon film 81, a tungsten silicide film 83, a silicon oxide film 85 and a photoresist layer 87 are successively formed on a silicon substrate 75 which is provided with field oxide films 77. Then, a mask 89 is arranged above the photoresist film 87.
As shown in FIG. 36, i rays are applied to the photoresist layer 87 through the mask 89, to expose the photoresist layer 87. Boundaries between the field oxide films 77 and the silicon oxide film 79 are stepped. Therefore, those of the i rays which are applied to such stepped portions are transmitted through the photoresist layer 87 and the silicon oxide film 85 and irregularly reflected by the tungsten silicide film 83, which is an opaque film. Parts of the irregularly reflected i rays again pass through the silicon oxide film 85, to expose a lower portion of the photoresist layer 87 which is located under a light intercepting portion 89a. FIG. 37 illustrates this state. Referring to FIG. 37, an exposed portion 87a of the photoresist layer 87 is provided also under an unexposed portion 87b. When the exposed portion 87a of the photoresist layer 87 is removed, therefore, the unexposed portion 87b is also removed and hence no gate electrode can be formed through a photoresist mask.
Japanese Patent Laying-Open No. 4-206817 (1992) discloses a technique which can prevent a photoresist portion from spreading, narrowing and separation. This technique is now described with reference to FIGS. 38 to 41.
As shown in FIG. 38, a gate oxide film 95, a polycrystalline silicon film 97, a liquid oxide film 99, a tungsten silicide film 101 and a photoresist layer 103 are successively formed on a substrate 91. Numeral 93 denotes field oxide films.
As shown in FIG. 39, the photoresist layer 103 is selectively exposed and developed. The tungsten silicide film 101, which is opaque, transmits no exposure light to the liquid oxide film 99. Thus, remaining portions of the photoresist layer 103 are neither spread nor narrowed by multiple reflection caused in the liquid oxide film 99. Further, the remaining portions of the photoresist layer 103 can be prevented from separation.
As shown in FIG. 40, the remaining portions of the photoresist layer 103 are employed as masks to selectively etch the layer formed by the tungsten silicide film 101, the liquid oxide film 99 and the polycrystalline silicon film 97.
As shown in FIG. 41, the remaining portions of the photoresist layer 103, the tungsten silicide film 101 and the liquid oxide film 99 are successively removed.
In order to reduce stepped portions, it is necessary to remove the tungsten silicide film 101. The stepped portions are reduced for the following reason: A semiconductor device has a multilayer structure. If films forming the semiconductor device are stepped, this may lead to disconnection of an interconnection film which is formed on the stepped portions, for example. In the technique disclosed in Japanese Patent Laying Open No. 4-206817, the tungsten silicide film 101 is removed after formation of a gate electrode, and hence the manufacturing steps are complicated.